Field of the Invention
The present invention relates to a solid-state imaging device, and more particularly, to a laminated solid-state imaging device, a manufacturing method therefor, and an imaging apparatus including the solid-state imaging device.
Description of Related Art
In recent years, video cameras and electronic still cameras have come into wide general use. In such cameras, charge coupled device (CCD) type or amplification type solid-state imaging devices are used. The amplification type solid-state imaging devices introduce signal charges generated and accumulated by photoelectric conversion portions of pixels on which light is incident to amplification portions provided in the pixels and output signals amplified by the amplification portions from the pixels. In the amplification type solid-state imaging devices, a plurality of such pixels are arrayed in a 2-dimensional matrix form. As the amplification type solid-state imaging devices, for example, there are complementary metal oxide semiconductor (CMOS) solid-state imaging devices in which CMOS transistors are used.
In CMOS solid-state imaging devices of the related art, a scheme in which circuit units provided in the same substrate sequentially read signal charges generated by photoelectric conversion portions of pixels arrayed in a 2-dimensional matrix form for each row is adopted. In CMOS solid-state imaging devices having general monolithic structures (structures manufactured from a single semiconductor substrate), peripheral circuits such as vertical scanning circuits, horizontal scanning circuits, column processing circuits, and output circuits are disposed in the periphery of a pixel array unit converting incident light into signal charges when viewed from a surface on which light is incident. Further, wirings are provided for each row or each column between the pixel may unit and the peripheral circuits in order to deliver electric signals.
At present, in CMOS solid-state imaging devices, there are demands to improve data rates, improve imaging identity in a plane, and provide high functions. In the CMOS solid-state imaging device having the monolithic structure, however, it is difficult to improve performance due to speed restriction or density restriction by electric conduction in a plan direction. Accordingly, as such CMOS solid-state imaging devices, various solid-state imaging devices configured as single devices by electrically connecting semiconductor chips in which pixel regions where a plurality of pixels are arrayed are formed to semiconductor chips in which logical circuits performing signal processing are formed have been proposed to improve functions and performance.
Japanese Unexamined Patent Application, First Publication No. 2006-049361 discloses a semiconductor module in which a backside irradiation type image sensor chip which has a micro pad in units of pixels and a signal processing chip in which a signal processing circuit is formed and which has the micro pad are connected by a micro bump. Japanese Unexamined Patent Application, First Publication No. 2010-245506 discloses a configuration in which backside irradiation type solid imaging devices are formed by bonding a first semiconductor wafer including semi-finished pixel array units and a second semiconductor wafer including semi-finished logical circuits and subsequently performing separation by dicing or the like.